Ch4 Processor Funcdamentals part1 CPU

Part1: Central Processor Unit

1.\(\star\) Von Neumann & Stored-program concept

Von Neumann architecture

  1. Singal processor
  2. Program consists of a sequence of instructions
  3. Instructions & data are identical in memory
  4. Stored in contiguous blocks of main menory
  5. Instructions are fetched & executed in sequence

Stored-program concept

(笔记有误)

2.Register

2.1 General pupose

  1. Hold data that frequently used by CPU
  2. Used by the programmer when addressing CPU
    • Accumalator

2.2 Special purpose

  1. Special functionos with in CPU
  2. Hold program state

3.Different type of special register

3.1 PC: Program Counter

  • Stores the address of the next instruction to be executed

3.2 MDR: Memory Data Register

  1. stores data in transit between memory and other registers
  2. Holds instruction before pass to CIR
  3. The location accessed what is stored in MAR

3.3 MAR: Memory Address Register

  • stores the address of the memory location accessed next

3.4 ACC: Accumulator

  • Store the vaule cacaulted by ALU

3.5 IR: Instruction Register

  • Carry index addressing operation

3.6 CIR: Current Instruction Register

  • Stores the instruction currently being executed & decoded

3.7 SR: Status Register

  1. Return FlAG from a list
  2. Each flag depends on different ERROR
    • e.g: Overflow, Zero, Negative...

4. ALU, CU, Sysytem clock, IAS

4.1 ALU: Arithmetic Logic Unit

  1. Carry out the arithmetic and logic operations
  2. Hold the result in the ACC(accumulator)

4.2 CU: Control Unit

  1. Sends & receives signals from ALU
  2. Syncronizes operations with System clock
  3. Control the execution of instructions

4.3 System clock

Sends numbers of pulse in a given time

  1. Each processor operation takte serveal cycles
  2. Highrt clock speed = faster processor

4.4 IAS: Immediate Access Store

Holds all the data and program that CPU require

5. Transterred data in different BUS

5.1 Address bus

  1. Transfers address of memory & in/output position
  2. One way transferr

5.2 Data bus

  1. Carries data between processor & menory
  2. Two way transfer

5.3 Control bus

  1. Transfers control signals between control units
  2. Dedicated BUS
  3. Signal generated by control units

6. Performance of Computer system

  1. Clock speed
    • Higher clock speed,shorter time for each F-E cycle
  2. Number of core
    • Number of instruction cna run at once
  3. Cache(SRAM)
    • Higher capacity
    • More frequent access & store instructions
    • (Main memory are DRAM)