Ch15 Hardware and Virtual Machines

Ch15 Hardware and Virtual Machines
Aaron1. Processor Architectures
CISC
Complex Instrcuction Set Computer
- Uses many instruction formats
- Uses variable length instructions
- Makes use of different addressing modes
- Uses few registers
- Has a large instruction set
- Requires complex circuits
- Frequently uses cache
- Instructions (converted to sub-instructions that) may require many clock cycles
- Programmable CU
RISC
Reduced Instruction Set Computer
- Uses simple instructions
- Uses fixed length instructions
- Instructions only require one clock cycle
- Uses many registers
- Makes use of pipelining
- Hardwired CU
Pipelining
What is meant by piplining?
- Pipelining is instruction level parallelism
- Execution of an instruction is split into a number of
stages
- instruction fetch
- instruction decode
- Operand fetch
- instruction execute
- Write back results
- When first stage for an instruction is completed the first stage of the next instruction can start executing
- Another instruction can start executing before the previous one is
finished
- Processing of a number of instructions can be concurrent simultaneously
| Clock cycle: | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
|---|---|---|---|---|---|---|---|
| IF | A | B | C | D | |||
| ID | A | B | C | D | |||
| OF | A | B | C | D | |||
| IE | A | B | C | D | |||
| WB | A | B | C |
Compare
| Feature | RISC | CISC |
|---|---|---|
| Number of Instructions | Fewer | More |
| Number of Registers | Many | Few |
| Instruction Complexity | Simpler | More Complex |
| Instruction Formats | Few | Many |
| Instruction Cycles | Single-cycle | Multi-cycle |
| Instruction Length | Fixed-length | Variable-length |
| Pipeline Efficiency | Better | Poorer |
| Circuit Complexity | Less Complex | More Complex |
| Addressing Modes | Fewer | More |
| Memory Usage | More use of RAM | More use of Cache/Less use of RAM |
| Control Unit | Hard-wired Control Unit | Programmable Control Unit |
| Memory Access Instructions | Only Load and Store for Memory Access | Various Instructions for Memory Access |
2. 4 categories of basic computer artchitechture
SISD
- Single Instruction, Single Data
- embedded system , old systems
SIMD
- Single Instruction, Multiple Data
- GPU , graphics processing , 3D
MISD
- Multiple Instruction, Single Data
- Programming AI , CNN
MIMD
- Multiple Instruction, Multiple Data
- Large data & caculation
- Massive parallel computer systems
Massive parallel computer systems
- A large number of computer processors connected together
- working together collaboratively & simultaneously on the same program
- Communicating by message interface






